TY - JOUR Kun Luo; Kui Gong; Jiangchai Chen; Shengli Zhang; Yongliang Li; Huaxiang Yin; Zhenhua WuT1 - First-principles Simulations of Tunneling FETs Based on van der Waals MoTe2/SnS2 Heterojunctions with Gate-to-drain Overlap Design JO - Journal of Microelectronic Manufacturing VL - 3 Y1 - 2020/12/30 UR - http://www.jommpublish.org/p/55/65/ L1 - http://www.jommpublish.org/jomm_data/publish/E4/0C/0A/326D9044FAA711462D647F8946/10.33079.jomm.20030405.pdf DO - 10.33079/jomm.20030405 ER -